GPIO and HSIO inputs allow common mode settings for differential receivers. It assists in preventing common-mode mismatches between devices.
The following table lists the programmable differential termination control support and settings. For more information about common mode voltage levels for various I/O standards, see respective PolarFire FPGA Datasheet or PolarFire SoC Advance Datasheet.
I/O Standards | Supported I/O Types | Differential Termination Type1 |
---|---|---|
SSTL18 | GPIO, HSIO | Off, Low, Mid |
HSUL18 | GPIO, HSIO | Off, Low, Mid |
SSTL15 | GPIO, HSIO | Off, Low, Mid |
HSTL15 | GPIO, HSIO | Off, Low, Mid |
SSTL135 | HSIO | Off, Low, Mid |
HSTL135 | HSIO | Off, Low1, Mid |
HSUL12I | HSIO | Off, Low, Mid |
HSTL12 | HSIO | Low, Mid |
POD12 | HSIO | Off, Low, Mid |
SSTL25 | GPIO | — |
SLVS25 | GPIO, HSIO | MID (HSIO) Low, Mid (GPIO) |
HCSL25 | GPIO, HSIO | MID (HSIO) Low, Mid (GPIO) |
SLVSE | GPIO, HSIO | Off, Mid (HSIO) Off, Low, Mid (GPIO) |
PPDS25 | GPIO, HSIO | Mid (HSIO) Off, Low, Mid (GPIO) |
MLVDSE | GPIO | Off, Low, Mid |
BUSLVDS | GPIO | Off, Low, Mid |
LVPECL | GPIO | Low, Mid |
LVDS | GPIO, HSIO | Mid (HSIO) Off, Low, Mid (GPIO) |
RSDS | GPIO, HSIO | Mid (HSIO) Off, Low, Mid (GPIO) |
MINILVDS | GPIO, HSIO | Mid (HSIO) Off, Low, Mid (GPIO) |
(1) For more information about low and mid differential termination types, see respective PolarFire FPGA Datasheet or PolarFire SoC Advance Datasheet. |
The programmable differential termination control values can be programmed by using the I/O attribute editor in Libero SoC or by using the following PDC command:
set_io –vcm_range <value>
Value can be set as listed in Table 1.