LVDS 7:1

A typical source-synchronous interface application is the 7:1 LVDS video interface (used in Channel Link, Flat Link, and Camera Link). This has become a common standard in many products including consumer devices, industrial control, medical, and automotive telematics. The display interface is a source synchronous LVDS interface. Seven data bits are serialized for each cycle of the low-speed clock. Typically, the interface consists of four (three data, one clock) or five (four data, one clock) LVDS pairs. The four pairs translate to 21 parallel data bits and five pairs translate to 28 parallel data bits.

Figure 1. Example of 7:1 LVDS Interface—Four Data and One Clock