Programmable Output Impedance Control

For voltage reference I/O standards, I/Os provide the option to control the driver impedance for certain I/O standards such as SSTL, HSUL, HSTL, POD, and LVSTL.

The following table lists the programmable output impedance support and settings.

Table 1. Programmable Output Impedance Standards
I/O Standards Supported I/O Types Impedance (Ω)
SSTL25I GPIO 48, 60, 80, 120
SSTL25II GPIO 34, 40, 48, 60
SSTL18I GPIO and HSIO 40, 48, 60, 80
SSTL18II GPIO and HSIO 30, 34, 40, 48
SSTL15I GPIO and HSIO 40, 48
SSTL15II GPIO and HSIO 27, 30, 34
SSTL135I HSIO 40, 48
SSTL135II HSIO 27, 30, 34
HSUL18I GPIO and HSIO 34, 40, 55, 60
HSUL18II GPIO and HSIO 22, 25, 27, 30
HSTL15I GPIO and HSIO 34, 40, 50, 60
HSTL15II GPIO and HSIO 22, 25, 27, 30
HSTL135I HSIO 34, 40, 50, 60
HSTL135II HSIO 22, 25, 27, 30
HSUL12I HSIO 34, 40, 48, 60, 80, 120
POD12I HSIO 40, 48, 60
POD12II HSIO 27, 30, 34
LVSTLI HSIO 30, 34, 40, 48, 60, 80, 120, 240
LVSTLII HSIO 30, 34, 40, 48, 60, 80, 120, 240

The output impedance values can be programmed by using the I/O attribute editor in Libero SoC or by using the following PDC command:

set_io –impedance <value>

Values can be set as listed in Table 1.