NMIFLAG

Non-Maskable Interrupt Flag Status and Clear

Important: For SAM L11 Non-Secure accesses, read and write accesses (RW*) are allowed only if the NMI interrupt is set as Non-Secure in the NONSEC register (NONSEC.NMI bit).
  0x2 8 Mix-Secure 0x00  
Parent topic: Register Description

Non-Maskable Interrupt Flag Status and Clear

Bit  7 6 5 4 3 2 1 0  
                NMI  
Access                RW/RW*/RW  
Reset                0  

Bit 0 – NMI: Non-Maskable Interrupt

Non-Maskable Interrupt

This flag is cleared by writing a '1' to it.

This flag is set when the NMI pin matches the NMI sense configuration, and will generate an interrupt request.

Writing a '0' to this bit has no effect.