APBA Mask
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Reserved | AC | PORT | FREQM | EIC | RTC | WDT | |||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
GCLK | SUPC | OSC32KCTRL | OSCCTRL | RSTC | MCLK | PM | PAC | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
AC APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the AC is stopped. |
1 | The APBA clock for the AC is enabled. |
PORT APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the PORT is stopped. |
1 | The APBA clock for the PORT is enabled. |
FREQM APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the FREQM is stopped. |
1 | The APBA clock for the FREQM is enabled. |
EIC APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the EIC is stopped. |
1 | The APBA clock for the EIC is enabled. |
RTC APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the RTC is stopped. |
1 | The APBA clock for the RTC is enabled. |
WDT APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the WDT is stopped. |
1 | The APBA clock for the WDT is enabled. |
GCLK APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the GCLK is stopped. |
1 | The APBA clock for the GCLK is enabled. |
SUPC APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the SUPC is stopped. |
1 | The APBA clock for the SUPC is enabled. |
OSC32KCTRL APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the OSC32KCTRL is stopped. |
1 | The APBA clock for the OSC32KCTRL is enabled. |
OSCCTRL APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the OSCCTRL is stopped. |
1 | The APBA clock for the OSCCTRL is enabled. |
RSTC APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the RSTC is stopped. |
1 | The APBA clock for the RSTC is enabled. |
MCLK APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the MCLK is stopped. |
1 | The APBA clock for the MCLK is enabled. |
PM APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the PM is stopped. |
1 | The APBA clock for the PM is enabled. |
PAC APBA Clock Enable
Value | Description |
---|---|
0 | The APBA clock for the PAC is stopped. |
1 | The APBA clock for the PAC is enabled. |
For future use
Reserved bits are unused and reserved for future use. For compatibility with future devices, always write reserved bits to their reset value. If no reset value is given, write 0.