COMPn

Compare n Value in COUNT16 mode (CTRLA.MODE=1)

Note: This register is write-synchronized: SYNCBUSY.COMPn must be checked to ensure the COMPn register synchronization is complete.
  0x20 + n*0x02 [n=0..1] 16 PAC Write-Protection, Write-Synchronized 0x0000     2 1 n
Parent topic: Register Description - Mode 1 - 16-Bit Counter

Compare n Value in COUNT16 mode (CTRLA.MODE=1)

Bit  15 14 13 12 11 10 9 8  
  COMP[15:8]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  COMP[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 15:0 – COMP[15:0]: Compare Value

Compare Value

The 16-bit value of COMPn is continuously compared with the 16-bit COUNT value. When a match occurs, the Compare n interrupt flag in the Interrupt Flag Status and Clear register (INTFLAG.CMPn) is set on the next counter cycle.