STATUSC

Peripheral Write Protection Status C

Reading the STATUSC register returns the peripheral write protection status:

Value Description
0 Peripheral is not write protected.
1 Peripheral is write protected.
Important: For SAM L11 Non-Secure accesses, read accesses (R*) are allowed only if the peripheral security attribution for the corresponding peripheral is set as Non-Secured in the NONSECx register.
  0x3C 32 Mix-Secure 0x000000  

Peripheral Write Protection Status C

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
      TRAM OPAMP CCL TRNG PTC DAC  
Access      R/R*/R R/R*/R R/R*/R R/R*/R R/R*/R R/R*/R  
Reset      0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  ADC TC2 TC1 TC0 SERCOM2 SERCOM1 SERCOM0 EVSYS  
Access  R/R*/R R/R*/R R/R*/R R/R*/R R/R*/R R/R*/R R/R*/R R/R*/R  
Reset  0 0 0 0 0 0 0 0  

Bit 13 – TRAM: Peripheral TRAM Write Protection Status

Peripheral TRAM Write Protection Status

Bit 12 – OPAMP: Peripheral OPAMP Write Protection Status

Peripheral OPAMP Write Protection Status

Bit 11 – CCL: Peripheral CCL Write Protection Status

Peripheral CCL Write Protection Status

Bit 10 – TRNG: Peripheral TRNG Write Protection Status

Peripheral TRNG Write Protection Status

Bit 9 – PTC: Peripheral PTC Write Protection Status

Peripheral PTC Write Protection Status

Bit 8 – DAC: Peripheral DAC Write Protection Status

Peripheral DAC Write Protection Status

Bit 7 – ADC: Peripheral ADC Write Protection Status

Peripheral ADC Write Protection Status

Bits 4, 5, 6 – TC: Peripheral TCn Write Protection Status [n = 2..0]

Peripheral TCn Write Protection Status [n = 2..0]

Bits 1, 2, 3 – SERCOM: Peripheral SERCOMn Write Protection Status [n = 2..0]

Peripheral SERCOMn Write Protection Status [n = 2..0]

Bit 0 – EVSYS: Peripheral EVSYS Write Protection Status

Peripheral EVSYS Write Protection Status