ADDR

Address

  0x24 32 PAC Write-Protection, Enable-Protected 0x00000000  
Parent topic: Register Description

Address

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
  ADDRMASK[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
  ADDR[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 23:16 – ADDRMASK[7:0]: Address Mask

Address Mask

These bits hold the address mask when the transaction format with address is used (CTRLA.FORM, CTRLB.AMODE).

Bits 7:0 – ADDR[7:0]: Address

Address

These bits hold the address when the transaction format with address is used (CTRLA.FORM, CTRLB.AMODE).