This register allows the user to enable an interrupt without doing a
read-modify-write operation. Changes in this register will also be reflected in the
Interrupt Enable Clear register (INTENCLR).
|
0x64 |
32 |
PAC Write-Protection |
0x00000000 |
|
Non-Secure Check
Interrupt Enable
Writing '0' to this bit has no effect.
Writing '1' to this bit will set the Non-Secure Check Interrupt Enable
bit, which enables the Non-Secure Check interrupt.
Value | Description |
---|
0 |
The
Non-Secure Check interrupt is disabled. |
1 |
The
Non-Secure Check interrupt is enabled. |