INTENSET

Interrupt Enable Set

This register allows the user to enable an interrupt without doing a read-modify-write operation. Changes in this register will also be reflected in the Interrupt Enable Clear register (INTENCLR).
  0x64 32 PAC Write-Protection 0x00000000  
Parent topic: Register Description

Interrupt Enable Set

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
                NSCHK  
Access                RW/RW/RW  
Reset                0  

Bit 0 – NSCHK: Non-Secure Check Interrupt Enable

Non-Secure Check Interrupt Enable

Writing '0' to this bit has no effect.


Writing '1' to this bit will set the Non-Secure Check Interrupt Enable bit, which enables the Non-Secure Check interrupt.

ValueDescription
0 The Non-Secure Check interrupt is disabled.
1 The Non-Secure Check interrupt is enabled.