Interrupt Enable Set in COUNT16 mode
(CTRLA.MODE=1)
This register allows the user to enable
an interrupt without doing a read-modify-write operation. Changes in this register will
also be reflected in the Interrupt Enable Clear (INTENCLR)
register.
|
0x0A |
16 |
PAC
Write-Protection |
0x0000 |
|
|
|
Overflow Interrupt
Enable
Writing a '0' to
this bit has no effect. Writing a '1' to this bit will set the Overflow Interrupt
Enable bit, which enables the Overflow interrupt.
Value | Description |
---|
0 |
The
Overflow interrupt is disabled. |
1 |
The
Overflow interrupt is enabled. |
Tamper Interrupt Enable
Writing a '0' to this bit has no effect. Writing a '1' to this bit
will set the Tamper Interrupt Enable bit, which enables the Tamper
interrupt.
Value | Description |
---|
0 |
The Tamper interrupt is
disabled. |
1 |
The Tamper interrupt is
enabled. |
Compare n Interrupt
Enable [n = 1..0]
Writing a '0' to
this bit has no effect. Writing a '1' to this bit will set the Compare n Interrupt
Enable bit, which and enables the Compare n interrupt.
Value | Description |
---|
0 |
The
Compare n interrupt is disabled. |
1 |
The
Compare n interrupt is enabled. |
Periodic Interval n
Interrupt Enable [n = 7..0]
Writing a '0' to
this bit has no effect. Writing a '1' to this bit will set the Periodic Interval n
Interrupt Enable bit, which enables the Periodic Interval n
interrupt.
Value | Description |
---|
0 |
Periodic Interval n interrupt is disabled. |
1 |
Periodic Interval n interrupt is enabled. |