DPLL Synchronization Busy
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
DPLLPRESC | DPLLRATIO | ENABLE | |||||||
Access | R | R | R | ||||||
Reset | 0 | 0 | 0 |
DPLL Prescaler Synchronization Status
Value | Description |
---|---|
0 | The DPLLRESC register has been synchronized. |
1 | The DPLLRESC register value has changed and its synchronization is in progress. |
DPLL Loop Divider Ratio Synchronization Status
Value | Description |
---|---|
0 | The DPLLRATIO register has been synchronized. |
1 | The DPLLRATIO register value has changed and its synchronization is in progress. |
DPLL Enable Synchronization Status
Value | Description |
---|---|
0 | The DPLLCTRLA.ENABLE bit has been synchronized. |
1 | The DPLLCTRLA.ENABLE bit value has changed and its synchronization is in progress. |