NSCHK

Security Attribution Check

This register allows the user to select one or more external pins to check their security attribution as non-secured.
Important: This register is only available for SAM L11 and has no effect for SAM L10.
  0x3C 32 PAC Write-Protection 0x00000000  
Parent topic: Register Description

Security Attribution Check

Bit  31 30 29 28 27 26 25 24  
  NMI                
Access  RW/RW/RW                
Reset  0                
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
  EXTINT[7:0]  
Access  RW/RW/RW RW/RW/RW RW/RW/RW RW/RW/RW RW/RW/RW RW/RW/RW RW/RW/RW RW/RW/RW  
Reset  0 0 0 0 0 0 0 0  

Bit 31 – NMI: Non-Maskable Interrupt Security Attribution Check

Non-Maskable Interrupt Security Attribution Check

This bit selects the Non-Maskable Interrupt pin for security attribution check. If the NMI bit in NONSECNMI is set to the opposite value, then the NSCHK interrupt flag will be set.

ValueDescription
0 0-to-1 transition will be detected on corresponding NONSEC bit.
1 1-to-0 transition will be detected on corresponding NONSEC bit.

Bits 7:0 – EXTINT[7:0]: External Interrupts Security Attribution Check

External Interrupts Security Attribution Check

These bits select the individual pins for security attribution check. If any pin selected in NSCHK has the corresponding bit in NONSEC set to the opposite value, then the NSCHK interrupt flag will be set.

ValueDescription
0 0-to-1 transition will be detected on corresponding NONSEC bit.
1 1-to-0 transition will be detected on corresponding NONSEC bit.