Early Warning Control
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
EWOFFSET[3:0] | |||||||||
Access | R/W | R/W | R/W | R/W | |||||
Reset | x | x | x | x |
Early Warning Interrupt Time Offset
Value | Name | Description |
---|---|---|
0x0 | CYC8 | 8 clock cycles |
0x1 | CYC16 | 16 clock cycles |
0x2 | CYC32 | 32 clock cycles |
0x3 | CYC64 | 64 clock cycles |
0x4 | CYC128 | 128 clock cycles |
0x5 | CYC256 | 256 clock cycles |
0x6 | CYC512 | 512 clock cycles |
0x7 | CYC1024 | 1024 clock cycles |
0x8 | CYC2048 | 2048 clock cycles |
0x9 | CYC4096 | 4096 clock cycles |
0xA | CYC8192 | 8192 clock cycles |
0xB - 0xF | Reserved | Reserved |