CFDCTRL

Clock Failure Detector Control

  0x16 8 PAC Write-Protection 0x00  
Parent topic: Register Description

Clock Failure Detector Control

Bit  7 6 5 4 3 2 1 0  
            CFDPRESC SWBACK CFDEN  
Access            R/W R/W R/W  
Reset            0 0 0  

Bit 2 – CFDPRESC: Clock Failure Detector Prescaler

Clock Failure Detector Prescaler

This bit selects the prescaler for the Clock Failure Detector.
ValueDescription
0 The CFD safe clock frequency is the OSCULP32K frequency
1 The CFD safe clock frequency is the OSCULP32K frequency divided by 2

Bit 1 – SWBACK: Clock Switch Back

Clock Switch Back

This bit clontrols the XOSC32K output switch back to the external clock or crystal scillator in case of clock recovery.
ValueDescription
0 The clock switch is disabled.
1 The clock switch is enabled. This bit is reset when the XOSC32K output is switched back to the external clock or crystal oscillator.

Bit 0 – CFDEN: Clock Failure Detector Enable

Clock Failure Detector Enable

This bit selects the Clock Failure Detector state.
ValueDescription
0 The CFD is disabled.
1 The CFD is enabled.