ENTRY1

CoreSight ROM Table Entry 1

  0x1004 32 PAC Write Protection -  

CoreSight ROM Table Entry 1

Bit  31 30 29 28 27 26 25 24  
  Reserved[19:12]  
Access  R R R R R R R R  
Reset  x x x x x x x x  
Bit  23 22 21 20 19 18 17 16  
  Reserved[11:4]  
Access  R R R R R R R R  
Reset  x x x x x x x x  
Bit  15 14 13 12 11 10 9 8  
  Reserved[3:0]          
Access  R R R R          
Reset  x x x x          
Bit  7 6 5 4 3 2 1 0  
              Reserved Reserved  
Access              R R  
Reset              x x  

Bits 31:12 – Reserved[19:0]

Bit 1 – Reserved

Bit 0 – Reserved