ADDR

Address

  0x0004 32 PAC Write-Protection 0x00000000  

Address

Bit  31 30 29 28 27 26 25 24  
  ADDR[29:22]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  ADDR[21:14]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  ADDR[13:6]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  ADDR[5:0] AMOD[1:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 1:0 – AMOD[1:0]: Address Mode

Address Mode

The functionality of these bits is dependent on the operation mode.

Bit description when testing on-Testing of On-Board Memories MBISTboard memories (MBIST): refer to

Bits 31:2 – ADDR[29:0]: Address

Address

Initial word start address needed for memory operations.