DSCC

Data Scramble Control

Important: This register is only available for SAM L11 and has no effect for SAM L10.
  0x30 32 PAC Write-Protection, Secure, Enable-Protected 0x00000000  
Parent topic: Register Description

Data Scramble Control

Bit  31 30 29 28 27 26 25 24  
      DSCKEY[29:24]  
Access      W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W  
Reset      0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  DSCKEY[23:16]  
Access  W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  DSCKEY[15:8]  
Access  W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  DSCKEY[7:0]  
Access  W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W W/-/W  
Reset  0 0 0 0 0 0 0 0  

Bits 29:0 – DSCKEY[29:0]: Data Scramble Key

Data Scramble Key

This key value is used for data scrambling of the Secure Data Flash. After reset the key is 0. When written, the new value in the register is an XOR of the value written and the previous value of DSCC.DSCKEY.

This register is write only and will always read back as zero.

This register is Enable-Protected with SECCTRL.DSCEN meaning that it can't be modified when DSCEN=1 otherwise a PAC error is generated.

Updated DSCC.DSCKEY contents <- DSCC.DSCKEY XOR value written.