Programming the Flash or RAM memories is only possible when the
debugger access level is sufficient to access the desired resource:
If DAL is equal to:
- 0x2: debugger
can access secured and non-secure areas
- 0x1 (SAM
L11 only): debugger can
access only non-secure areas, refer to Table 1.
- 0x0: debugger can only access the
DSU external address space making it possible to communicate with the Boot ROM
after reset.
A typical programming procedure when DAL=0x2 is as follows:
- 1.At power up,
RESET is driven low by a debugger. The on-chip
regulator holds the system in a POR state until the input supply is above the
POR threshold. The system continues to be held in this static
state until the internally regulated supplies have reached a safe operating
state.
- 2.The Power
Manager (PM) starts, clocks are switched to the slow clock (Core Clock, System
Clock, Flash Clock and any Bus Clocks that do not have clock gate control).
Internal resets are maintained due to the external reset.
- 3.The debugger
maintains a low level on SWCLK. RESET is released,
resulting in a debugger Cold-Plugging procedure.
- 4.The debugger
generates a clock signal on the SWCLK pin, the Debug Access Port (DAP) receives
a clock.
- 5.The CPU
executes the Boot ROM.
- 6.It is
recommended to issue a Chip-Erase (supported by the Boot ROM) to ensure that the
Flash is fully erased prior to programming.
- 7.If the
operation issued above was accepted and has completed successfully then DAL
equals 0x2 thus programming is available through the AHB-AP.
- 8.After the
operation is completed, the chip can be restarted either by asserting
RESET, toggling power, or sending a command to the
Boot ROM to jump to the NVM code. Make sure that the SWCLK pin is high when
releasing RESET to prevent entering again the
cold-plugging procedure with the Boot ROM stalling the CPU.