The SERCOM must be configured to the desired mode by writing the Operating Mode bits in the Control A register (CTRLA.MODE) as shown in the table below.
CTRLA.MODE | Description |
---|---|
0x0 | USART with external clock |
0x1 | USART with internal clock |
0x2 | SPI in client operation |
0x3 | SPI in host operation |
0x4 | I2C client operation |
0x5 | I2C host operation |
0x6-0x7 | Reserved |
For further initialization information, see the respective SERCOM mode chapters: