Interrupt Enable Clear
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
DRP | ERR | ||||||||
Access | R/W | R/W | |||||||
Reset | 0 | 0 |
Data Remanence Prevention Complete Interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the Data Remanence Prevention Complete Interrupt Enable bit, which disables the data remanence prevention complete interrupt.
Value | Description |
---|---|
0 | Data remanence prevention complete interrupt is disabled. |
1 | Data remanence prevention complete interrupt is enabled. |
TrustRAM Read Error Interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the TrustRAM Read Error Interrupt Enable bit, which disables the TrustRAM read error interrupt.
Value | Description |
---|---|
0 | TrustRAM read error interrupt is disabled. |
1 | TrustRAM read error interrupt is enabled. |