Verify Timing

In this step, HDL is verified for timing closure. In libero.tcl, use the following command to run Timing Verification.

Copyrun_tool -name {VERIFYTIMING}

Use this command with the catch statement as shown in the following snippet.

Copyif {[catch {run_tool -name {VERIFYTIMING}  }] } {
	  puts "VERIFYTIMING FAILED \n"
   } else {
	  puts "VERIFYTIMING PASSED \n"
   }    

For more information about adding Verify Timing parameters, see Tcl Commands Reference Guide for Libero SoC Design Suite.