TxTMR
TxTMR
Timer Counter Register
0x119,0x11F
8
2,4
x
Parent topic:
Register Definitions: Timer2 Control
TxTMR
Bit
7
6
5
4
3
2
1
0
TxTMR[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 7:0 – TxTMR[7:0]: Timerx Counter
Timerx Counter