IPR0

IPR0

Peripheral Interrupt Request Register 0
0x47D 8  
Parent topic: Register Definitions: Interrupt Control

IPR0

Bit  7 6 5 4 3 2 1 0  
  DMA1AIP DMA1ORIP DMA1DCNTIP DMA1SCNTIP INT2IP INT1IP INT0IP SWIP  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  

Bit 7 – DMA1AIP: DMA1 Abort Interrupt Priority

DMA1 Abort Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 6 – DMA1ORIP: DMA1 Overrun Interrupt Priority

DMA1 Overrun Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 5 – DMA1DCNTIP: DMA1 Destination Count Interrupt Priority

DMA1 Destination Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 4 – DMA1SCNTIP: DMA1 Source Count Interrupt Priority

DMA1 Source Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 3 – INT2IP: External Interrupt 2 Interrupt Priority

External Interrupt 2 Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 2 – INT1IP: External Interrupt 1 Interrupt Priority

External Interrupt 1 Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 1 – INT0IP: External Interrupt 0 Interrupt Priority

External Interrupt 0 Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 0 – SWIP: Software Interrupt Priority

Software Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority