WDTTMR

WDTTMR

WDT Timer Register (Read-Only)
Note:
  1. 1.The 18-bit WDT prescaler value, PSCNT[17:0] includes the WDTPSL, WDTPSH and the lower bits of the WDTTMR registers. PSCNT[17:0] is intended for debug operations and will not be read during normal operation.
  0x078 8   x

WDTTMR

Bit  7 6 5 4 3 2 1 0  
  TMR[4:0] STATE PSCNT[17:16]  
Access  R R R R R R R R  
Reset  0 0 0 0 0 0 0 0  

Bits 7:3 – TMR[4:0]: Watchdog Window Value

Watchdog Window Value

WINDOW WDT Window State Open Percent
Closed Open
111 N/A 00000-11111 100
110 00000-00011 00100-11111 87.5
101 00000-00111 01000-11111 75
100 00000-01011 01100-11111 62.5
011 00000-01111 10000-11111 50
010 00000-10011 10100-11111 37.5
001 00000-10111 11000-11111 25
000 00000-11011 11100-11111 12.5

Bit 2 – STATE: WDT Armed Status

WDT Armed Status

ValueDescription
1 WDT is armed
0 WDT is not armed

Bits 1:0 – PSCNT[17:16]: Prescaler Select Upper Byte(1)

Prescaler Select Upper Byte(1)