I2C Static Address

Every device on the I3C bus has a 7-bit Static Address that the device uses to communicate on the bus before it is assigned a Dynamic Address. This Target module stores the Static Address in the I3CxSADR register. The user must configure this Static Address during setup before the module is enabled for proper operation.

The Target module operates in I²C mode (OPMD = 0b00) using this Static Address after it is set up and enabled until it is assigned a Dynamic Address by the Controller. While the Target is operating in I²C mode, the Controller can engage with the Target through a legacy I²C read/write transaction. Refer to ²Legacy IC Transaction on I3C Bus for more information.

Since the I²C protocol does not support address arbitration, the Static Address is not arbitrable, meaning only the Controller can drive the Target’s Static Address on the bus when writing to (R/W bit = 0) or reading from (R/W bit = 1) the Target. When operating in I²C mode, the Target sets the SADRIF interrupt flag when it detects the Controller has transmitted the Target’s Static Address on the bus. The Target typically ACKs a read or write request from the Controller unless one of the buffer errors occur as mentioned in section Transmit and Receive Buffers, in which case the Target NACKs the request.

The Controller usually communicates at slower I²C speeds when communicating with an I²C device (or I3C devices operating in I²C mode) on the bus.

Important: The Target typically cannot drive the address on the bus in I²C mode with the exception of making a Hot-Join request, in which case it transmits the reserved I3C Hot-Join Address.