CLCnSEL1
CLCnSEL1
Generic CLCn Data 1 Select Register
0x1A8
8
Parent topic:
Register Definitions: Configurable Logic Cell
CLCnSEL1
Bit
7
6
5
4
3
2
1
0
D2S[5:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
Reset
x
x
x
x
x
x
Bits 5:0 – D2S[5:0]: CLCn Data2 Input Selection
CLCn Data2 Input Selection
Value
Description
n
Refer to the
CLC Input Selection
table for input selections