# 16x16 Signed Multiplication Algorithm

16x16 Signed Multiply Routine shows the sequence to do a 16x16 signed multiply. 16x16 Signed Multiply Algorithm shows the algorithm used. The 32-bit result is stored in four registers. To account for the sign bits of the arguments, the MSb for each argument pair is tested and the appropriate subtractions are done.

## 16x16 Signed Multiply Algorithm

RES3:RES0=ARG1H:ARG1LARG2H:ARG2L=(ARG1HARG2H216)+(ARG1HARG2L28)+(ARG1LARG2H28)+(ARG1LARG2L)+(1ARG2H<7>ARG1H:ARG1L216)+(1ARG1H<7>ARG2H:ARG2L216)

## 16x16 Signed Multiply Routine

MOVF    ARG1L, W
MULW    ARG2L           ; ARG1L * ARG2L → PRODH:PRODL
MOVF    PRODH, RES1     ;
MOVFF   PRODL, RES0     ;
;
MOVF    ARG1H, W
MULWF   ARG2H           ; ARG1H * ARG2H → PRODH:PRODL
MOVFF   PRODH, RES3     ;
MOVFF   PRODL, RES2     ;
;
MOVF    ARG1L, W
MULWF   ARG2H           ; ARG1L * ARG2H → PRODH:PRODL
MOVF    PRODL, W        ;
MOVF    PRODH, W        ;
CLRF    WREG            ;
;
MOVF    ARG1H, W        ;
MULWF   ARG2L           ; ARG1H * ARG2L → PRODH:PRODL
MOVF    PRODL, W        ;
MOVF    PRODH, W        ;
CLRF    WREG            ;
;
BTFSS   ARG2H, 7        ; ARG2H:ARG2L neg?
BRA     SIGN_ARG1       ; no, check ARG1
MOVF    ARG1L, W        ;
SUBWF   RES2            ;
MOVF    ARG1H, W        ;
SUBWFB  RES3
;
SIGN_ARG1:
BTFSS   ARG1H, 7        ; ARG1H:ARG1L neg?
BRA     CONT_CODE       ; no, done
MOVF    ARG2L, W        ;
SUBWF   RES2            ;
MOVF    ARG2H, W        ;
SUBWFB  RES3
;
CONT_CODE:
: