The use of decoupling capacitors on every pair of power supply pins
(VDD and VSS) is
required.
Consider the following criteria when using decoupling
capacitors:
- Value and type of capacitor: A 0.1 μF (100 nF), 10-20V capacitor
is recommended. The capacitor needs to be a low-ESR device, with a resonance frequency
in the range of 200 MHz and higher. Ceramic capacitors are recommended.
- Placement on the printed circuit board: The decoupling
capacitors need to be placed as close to the pins as possible. It is recommended to
place the capacitors on the same side of the board as the device. If space is
constricted, the capacitor can be placed on another layer on the PCB using a via;
however, ensure that the trace length from the pin to the capacitor is no greater than
0.25 inch (6 mm).
- Handling high-frequency noise: If the board is experiencing
high-frequency noise (upward of tens of MHz), add a second ceramic type capacitor in
parallel to the above described decoupling capacitor. The value of the second capacitor
can be in the range of 0.01 μF to 0.001 μF. Place this second capacitor next to each
primary decoupling capacitor. In high-speed circuit designs, consider implementing a
decade pair of capacitances as close to the power and ground pins as possible (e.g., 0.1
μF in parallel with 0.001 μF).
- Maximizing performance: On the board layout from the power
supply circuit, run the power and return traces to the decoupling capacitors first, and
then to the device pins. This ensures that the decoupling capacitors are first in the
power chain. Equally important is to keep the trace length between the capacitor and the
power pins to a minimum, thereby reducing PCB trace inductance.