I2CxERR

I2CxERR

I2C Error Register
Notes:
  1. 1.Enabled error interrupt flags are OR’ed to produce the PIRx[I2CxEIF] bit.
  2. 2.User software must select the Bus Time-out source in the I2CxBTOC register.
  3. 3.NACKIF is also set when any of the TXWE, RXRE, TXU, or RXO bits are set.
  4. 4.NACKIF is not set for the NACK response to a non-matching client address.
0x01EC 8         1 1 x
Parent topic: Register Definitions: I2C Control

I2CxERR

Bit  7 6 5 4 3 2 1 0  
    BTOIF BCLIF NACKIF   BTOIE BCLIE NACKIE  
Access    R/W/HS R/W/HS R/W/HS   R/W R/W R/W  
Reset    0 0 0   0 0 0  

Bit 6 – BTOIF: Bus Time-out Interrupt Flag(1,2)

Bus Time-out Interrupt Flag(1,2)

ValueDescription
1 Bus time-out event occurred
0 No bus time-out event occurred

Bit 5 – BCLIF: Bus Collision Detect Interrupt Flag(1)

Bus Collision Detect Interrupt Flag(1)

ValueDescription
1 Bus collision detected
0 No bus collision occurred

Bit 4 – NACKIF: NACK Detect Interrupt Flag(1,3,4)

NACK Detect Interrupt Flag(1,3,4)

ValueDescription
1 NACK detected on the bus (when SMA = 1 or MMA = 1)
0 No NACK detected on the bus

Bit 2 – BTOIE: Bus Time-out Interrupt Enable

Bus Time-out Interrupt Enable

ValueDescription
1 Enable Bus Time-out interrupts
0 Disable Bus Time-out interrupts

Bit 1 – BCLIE: Bus Collision Detect Interrupt Enable

Bus Collision Detect Interrupt Enable

ValueDescription
1 Enable Bus Collision interrupts
0 Disable Bus Collision interrupts

Bit 0 – NACKIE: NACK Detect Interrupt Enable

NACK Detect Interrupt Enable

ValueDescription
1 Enable NACK detect interrupts
0 Disable NACK detect interrupts