SCANHADR

SCANHADR

Scan High Address Registers
Notes:
  1. 1.Registers SCANHADRU/H/L form a 22-bit value but are not guarded for atomic or asynchronous access; registers may only be read or written while SGO = 0.
  2. 2.While SGO = 1, writing to this register is ignored.
  0x06E 24    
Parent topic: Register Definitions: CRC and Scanner Control

SCANHADR

Bit  23 22 21 20 19 18 17 16  
      SCANHADRU[5:0]  
Access      R/W R/W R/W R/W R/W R/W  
Reset      1 1 1 1 1 1  
Bit  15 14 13 12 11 10 9 8  
  SCANHADRH[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  
Bit  7 6 5 4 3 2 1 0  
  SCANHADRL[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  

Bits 7:0 – SCANHADRL[7:0]: Scan End Address

Scan End Address

Low byte of the address at the end of the designated scan

Bits 15:8 – SCANHADRH[7:0]: Scan End Address

Scan End Address

High byte of the address at the end of the designated scan

Bits 21:16 – SCANHADRU[5:0]: Scan End Address

Scan End Address

Upper bits of the address at the end of the designated scan