PIE7

PIE7

Peripheral Interrupt Enable Register 7
0x47A 8  
Parent topic: Register Definitions: Interrupt Control

PIE7

Bit  7 6 5 4 3 2 1 0  
    I2C1EIE I2C1IE I2C1TXIE I2C1RXIE SPI1IE SPI1TXIE SPI1RXIE  
Access    R/W R/W R/W R/W R/W R/W R/W  
Reset    0 0 0 0 0 0 0  

Bit 6 – I2C1EIE: I2C1 Error Interrupt Enable

I2C1 Error Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 5 – I2C1IE: I2C1 Interrupt Enable

I2C1 Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 4 – I2C1TXIE: I2C1 Transmit Interrupt Enable

I2C1 Transmit Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 3 – I2C1RXIE: I2C1 Receive Interrupt Enable

I2C1 Receive Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 2 – SPI1IE: SPI1 Interrupt Enable

SPI1 Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 1 – SPI1TXIE: SPI1 Transmit Interrupt Enable

SPI1 Transmit Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 0 – SPI1RXIE: SPI1 Receive Interrupt Enable

SPI1 Receive Interrupt Enable

ValueDescription
1 Enabled
0 Disabled