PIE1

PIE1

Peripheral Interrupt Enable Register 1
0x474 8  
Parent topic: Register Definitions: Interrupt Control

PIE1

Bit  7 6 5 4 3 2 1 0  
  DMA3AIE DMA3ORIE DMA3DCNTIE DMA3SCNTIE DMA2AIE DMA2ORIE DMA2DCNTIE DMA2SCNTIE  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bit 7 – DMA3AIE: DMA3 Abort Interrupt Enable

DMA3 Abort Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 6 – DMA3ORIE: DMA3 Overrun Interrupt Enable

DMA3 Overrun Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 5 – DMA3DCNTIE: DMA3 Destination Count Interrupt Enable

DMA3 Destination Count Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 4 – DMA3SCNTIE: DMA3 Source Count Interrupt Enable

DMA3 Source Count Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 3 – DMA2AIE: DMA2 Abort Interrupt Enable

DMA2 Abort Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 2 – DMA2ORIE: DMA2 Overrun Interrupt Enable

DMA2 Overrun Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 1 – DMA2DCNTIE: DMA2 Destination Count Interrupt Enable

DMA2 Destination Count Interrupt Enable

ValueDescription
1 Enabled
0 Disabled

Bit 0 – DMA2SCNTIE: DMA2 Source Count Interrupt Enable

DMA2 Source Count Interrupt Enable

ValueDescription
1 Enabled
0 Disabled