ADACC

ADACC

ADC Accumulator Register(1)

See the “Computation Operation” section for more details.

Important: This register contains signed two’s complement accumulator value and the upper unused bits contain copies of the sign bit.
Notes:
  1. 1.This register can only be written when GO = 0.
  2. 2.The individual bytes in this multibyte register can be accessed with the following register names:
    • ADACCU: Accesses the upper byte ADACC[17:16]
    • ADACCH: Accesses the high byte ADACC[15:8]
    • ADACCL: Accesses the low byte ADACC[7:0].
  0x21F 24  
Parent topic: Register Definitions: ADC Control

ADACC

Bit  23 22 21 20 19 18 17 16  
  ACC[23:16]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  x x x x x x x x  
Bit  15 14 13 12 11 10 9 8  
  ACC[15:8]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  x x x x x x x x  
Bit  7 6 5 4 3 2 1 0  
  ACC[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  x x x x x x x x  

Bits 23:0 – ACC[23:0]: ADC Accumulator - Signed two’s complement

ADC Accumulator - Signed two’s complement