Destination Stop

When the Destination Stop bit is set (DSTP = 1) and the DMAnDCNT register reloads, the DMA clears the SIRQEN bit to stop receiving new start interrupt request signals and sets the DMAxDCNTIF flag.

Figure 1. GPR-GPR Transactions with Hardware Triggers, DSTP = 1
  1. 1.SR - Source Read
  2. 2.DW - Destination Write