Power-Down Current (IPD)(1,2)

Table 1.
Standard Operating Conditions (unless otherwise stated)
Param. No. Sym. Device Characteristics Min. Typ.† Max. +85°C Max. +125°C Units Conditions
D200 IPD IPD Base μA VDD=3.0V
μA VDD=3.0V
μA VDD=3.0V
160 μA ‘b00 VDD=3.0V
50 μA VDDIO2=3.6V
50 μA VDDIO3=3.6V
D201 IPD_WDT Low-Frequency Internal Oscillator/WDT 1.5 3.8 5.1 μA 3.0V ‘b11  
D202 IPD_SOSC Secondary Oscillator (SOSC) 2.1 4.6 7.9 μA 3.0V ‘b11  
D203 IPD_LPBOR Low-Power Brown-out Reset (LPBOR) 1.3 3.5 4.8 μA 3.0V ‘b11  
D204 IPD_FVR_BUF1 FVR Buffer 1 (ADC) 174.7 249.7 255.4 μA 3.0V ‘b11  
D205 IPD_BOR Brown-out Reset (BOR) 16.6 20.4 20.8 μA 3.0V ‘b11  
D206 IPD_HLVD High/Low Voltage Detect (HLVD) 16.9 20.8 22.5 μA 3.0V ‘b11  
D207 IPD_ADCA ADC - Active 483 789 790 μA 3.0V ‘bx1 or ‘b10 ADC is converting (Note 4)

* These parameters are characterized but not tested.

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

  1. 1.The peripheral current is the sum of the base IDD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPDcurrent from this limit. Max. values may be used when calculating total current consumption.
  2. 2.The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode with all I/O pins in High Impedance state and tied to VSS.
  3. 3.All peripheral currents listed are on a per-peripheral basis if more than one instance of a peripheral is available.
  4. 4.ADC clock source is ADCRC.