CCP Control Register
  1. 1.The set and clear operations of the Compare mode are reset by setting MODE = ‘b0000 or EN = 0.
  2. 2.When MODE = ‘b0001 or ‘b1011, then the timer associated with the CCP module is cleared. TMR1 is the default selection for the CCP module, so it is used for indication purposes only.
  0x14B,0x14F 8   1,2 x


Bit  7 6 5 4 3 2 1 0  
  EN   OUT FMT MODE[3:0]  
Access  R/W   R R/W R/W R/W R/W R/W  
Reset  0   x 0 0 0 0 0  

Bit 7 – EN: CCP Module Enable

CCP Module Enable

1 CCP is enabled
0 CCP is disabled

Bit 5 – OUT: CCP Output Data (read-only)

CCP Output Data (read-only)

Bit 4 – FMT: CCPxRH:L Value Alignment (PWM mode)

CCPxRH:L Value Alignment (PWM mode)

x Capture mode Not used
x Compare mode Not used
1 PWM mode Left aligned format
0 PWM mode Right aligned format

Bits 3:0 – MODE[3:0]: CCP Mode Select

CCP Mode Select

Table 1. CCPx Mode Select
MODE Value Operating Mode Operation Set CCPxIF
11xx PWM PWM operation Yes
1011 Compare Pulse output; clear TMR1(2) Yes
1010 Pulse output Yes
1001 Clear output(1) Yes
1000 Set output(1) Yes
0111 Capture Every 16th rising edge of CCPx input Yes
0110 Every 4th rising edge of CCPx input Yes
0101 Every rising edge of CCPx input Yes
0100 Every falling edge of CCPx input Yes
0011 Every edge of CCPx input Yes
0010 Compare Toggle output Yes
0001 Toggle output; clear TMR1(2) Yes
0000 Disabled