Timer Period Register

The TUxyPR period register establishes the period of the periodic timer operation or the duration of hardware limit timing. The register size is the same as the timer size and is initialized to the maximum value.

The TUxyPR period register is double-buffered to simplify software timing and provide atomic updates. Writing to the higher bytes of TUxyPR always stores data into buffer registers, but does not change the effective PR value. If the timer is not counting (ON = 0), writing to the Least Significant Byte will change the effective PR value immediately to the full buffered value. If the timer is counting (ON = 1), writing to the LSB of TUxyPR is also buffered and is considered armed for an update. When a second qualifying event occurs, which is a Reset event, the effective PR value is changed to the full buffered value.
  1. 1.Writing to MSBs after arming the load can lead to corrupted operation.
  2. 2.Reading the TUxyPR period register returns the most-recently written value, not necessarily the current effective PR value.