UxTXB
UxTXB
UART Transmit Register
0x1B1,0x1C5
8
1,2
x
Parent topic:
Register Definitions: UART
UxTXB
Bit
7
6
5
4
3
2
1
0
TXB[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 7:0 – TXB[7:0]: Bottom of Transmit FIFO
Bottom of Transmit FIFO