CPUDOZE

CPUDOZE

Doze and Idle Register

Note:
  1. 1.When ROI = 1 or DOE = 1.
  0x4F2 8  

CPUDOZE

Bit  7 6 5 4 3 2 1 0  
  IDLEN DOZEN ROI DOE   DOZE[2:0]  
Access  R/W R/W/HC/HS R/W R/W/HC/HS   R/W R/W R/W  
Reset  0 0 0 0   0 0 0  

Bit 7 – IDLEN: Idle Enable

Idle Enable

ValueDescription
1

A SLEEP instruction places device into Idle mode

0

A SLEEP instruction places the device into Sleep mode

Bit 6 – DOZEN: Doze Enable(1)

Doze Enable(1)

ValueDescription
1

Places devices into Doze setting

0

Places devices into Normal mode

Bit 5 – ROI: Recover-on-Interrupt(1)

Recover-on-Interrupt(1)

ValueDescription
1

Entering the Interrupt Service Routine (ISR) makes DOZEN = 0

0

Entering the Interrupt Service Routine (ISR) does not change DOZEN

Bit 4 – DOE: Doze-on-Exit(1)

Doze-on-Exit(1)

ValueDescription
1

Exiting the ISR makes DOZEN = 1

0

Exiting the ISR does not change DOZEN

Bits 2:0 – DOZE[2:0]: Ratio of CPU Instruction Cycles to Peripheral Instruction Cycles

Ratio of CPU Instruction Cycles to Peripheral Instruction Cycles

ValueDescription
111

1:256

110

1:128

101

1:64

100

1:32

011

1:16

010

1:8

001

1:4

000

1:2