I3CxCON

I3CxCON

I3C Control

Notes:
  1. 1.Self-clears after Reset is complete.
  2. 2.Self-clears when HJDONEIF bit is set by the hardware.
  3. 3.Self-clears when IBIDONEIF bit is set by the hardware.
  4. 4.In case of a race condition, user writes always take precedence over hardware events.
0x083, 0x0B4 8     1index x
Parent topic: Register Definitions: I3C Control

I3CxCON

Bit  7 6 5 4 3 2 1 0  
  EN BTOEN RST CLRRXB CLRTXB   HJREQ IBIREQ  
Access  R/W R/W R/W/HC R/W/HC R/W/HC   R/W/HC R/W/HC  
Reset  0 0 0 0 0   0 0  

Bit 7 – EN: Target Enable

Target Enable

ValueDescription
1 Enable the Target interface
0 Disable the Target interface

Bit 6 – BTOEN: Bus Time-out Enable

Bus Time-out Enable

ValueDescription
1 Bus Time-out counter (I3CxBTO) is enabled
0 Bus Time-out counter (I3CxBTO) is disabled

Bit 5 – RST: Software Reset(1)

Software Reset(1)

ValueDescription
1 Initiate a software Reset of the module
0 A software module Reset has not been initiated, or was completed

Bit 4 – CLRRXB: Clear Receive Buffer(1)

Clear Receive Buffer(1)

ValueDescription
1 Initiate a Reset of the Read FIFO and I3CxRXB Receive Buffer
0 A Read FIFO and I3CxRXB Receive Buffer Reset has not been initiated, or was completed

Bit 3 – CLRTXB: Clear Transmit Buffer(1)

Clear Transmit Buffer(1)

ValueDescription
1 Initiate a Reset of the Write FIFO and I3CxTXB Transmit Buffer
0 A Write FIFO and I3CxTXB Transmit Buffer Reset has not been initiated, or was completed

Bit 1 – HJREQ: Hot-Join Request(2)

Hot-Join Request(2)

ValueDescription
1 Initiate a Hot-Join Request to the Controller upon next Bus Idle condition
0 A Hot-Join Request has not been initiated, or was completed

Bit 0 – IBIREQ: In-Band Interrupt Request(3)

In-Band Interrupt Request(3)

ValueDescription
1 Initiate an In-Band Interrupt Request to the Controller upon next Bus Idle condition
0 An In-Band Interrupt Request has not been initiated, or was completed