IOLVCON

IOLVCON

Input/Output Low-Voltage Buffer Control Register

Note: Each bit in this register is conditionally effective based on the respective domain having an I3C module using a domain pin is currently enabled and RxyI2C.TH = INLVLxy. If neither condition is met, the Low-Voltage Buffers on that domain are disabled and the corresponding bit is ignored. Refer to section I3C Low Voltage Buffer for more information.
0x4A7 8     1index x
Parent topic: Register Definitions: I3C Control

IOLVCON

Bit  7 6 5 4 3 2 1 0  
              VDDIO3LVEN VDDIO2LVEN  
Access              R/W R/W  
Reset              0 0  

Bit 1 – VDDIO3LVEN: VDDIO3 Domain Low-Voltage Buffer Enable

VDDIO3 Domain Low-Voltage Buffer Enable

ValueDescription
1 Low-voltage (below device’s minimum VDD) buffers on applicable VDDIO3 domain pads are always enabled
0 Low-voltage (below device’s minimum VDD) buffers on applicable VDDIO3 domain pads are disabled by default but may be enabled if required by the system

Bit 0 – VDDIO2LVEN: VDDIO2 Domain Low-Voltage Buffer Enable

VDDIO2 Domain Low-Voltage Buffer Enable

ValueDescription
1 Low-voltage (below device’s minimum VDD) buffers on applicable VDDIO3 domain pads are always enabled
0 Low-voltage (below device’s minimum VDD) buffers on applicable VDDIO3 domain pads are disabled by default but may be enabled if required by the system