Use the edge detector to generate a pulse when detecting a rising edge on its input. Program the truth table to provide an inverted output to detect a falling edge.
The edge detector is enabled by writing a ‘1’
to the Edge Selection (EDGEDET) bit in the CCL.LUTnCTRLA register. To avoid
unpredictable behavior, a valid filter option must be enabled as well.
The edge detection is disabled by writing
a ‘0’ to the EDGEDET bit in the CCL.LUTnCTRLA register. After disabling
an LUT, the corresponding internal edge detector logic is cleared one clock cycle
later.
Figure 1. Edge Detector
