Contents

Introduction 2. Overview 2.1. Programming Data Flow 2.2. Pin Utilization 2.3. Hardware Requirements 2.3.1. High-Voltage ICSP Programming 2.3.2. Low-Voltage ICSP Programming 2.3.2.1. Single-Supply ICSP Programming 2.4. Write and/or Erase Section 2.4.1. Erasing Memory 2.4.2. Writing Memory 3. Memory Map 3.1. User ID Location 3.2. Device/Revision ID 3.3. Device Configuration Information (DCI) 3.4. Configuration Bytes 3.5. Device ID 3.6. Revision ID 4. Programming Algorithms 4.1. Program/Verify Mode 4.1.1. High-Voltage Program/Verify Mode Entry and Exit 4.1.1.1. VPP-First Entry Mode 4.1.1.2. VDD-First Entry Mode 4.1.1.3. Program/Verify Mode Exit 4.1.2. Low-Voltage Programming (LVP) Mode 4.1.3. Program/Verify Commands 4.1.3.1. Program Data 4.1.3.2. Read Data from NVM 4.1.3.3. Increment Address 4.1.3.4. Load PC Address 4.1.3.5. Bulk Erase 4.1.3.6. Page Erase Program Memory 4.1.3.7. Program Access Enable 4.2. Programming Algorithms 4.3. Enhanced Code Protection 4.4. Hex File Usage 4.4.1. Embedding Configuration Information in the Hex File 4.4.2. Embedding Data EEPROM Information in the Hex File 4.5. CRC Checksum Computation 5. Electrical Specifications 6. Appendix A: Revision History 7. Appendix B 7.1. CONFIG1 7.2. CONFIG2 7.3. CONFIG3 7.4. CONFIG4 7.5. CONFIG5 7.6. CONFIG6 7.7. CONFIG7 7.8. CONFIG8 7.9. CONFIG9 7.10. CONFIG10 7.11. CONFIG11 7.12. CONFIG12 7.13. CONFIG14 7.14. Register Summary The Microchip Website Product Change Notification Service Customer Support Microchip Devices Code Protection Feature Legal Notice Trademarks Quality Management System Worldwide Sales and Service