In Backup (BACKUP) sleep mode only the backup domain is powered and only registers in this domain will hold their value. Refer to Power Domains for more details on the backup power domain. SRAM will also be turned off and not retain any data. This mode can be entered by executing the WFI instruction with BACKUP written to the Sleep Mode bit group in the Sleep Configuration register (SLEEPCFG.SLEEPMODE written to 0x5). Wakeup from BACKUP will be similar to a device start-up after reset. The device will start executing code in the reset handler and load data from flash to SRAM. The difference is that the peripheral registers in the backup domain will retain their value and the Real-Time Counter (RTC) will, if enabled, continue to run. The I/O Retention bit in the Control A register (CTRLA.IORET) in the Power Manager (PM) is used to decide whether or not the I/O lines are to hold their value when exiting BACKUP. The Reset Cause (RCAUSE) register in the Reset Controller (RSTC) will indicate the reset source after a reset. If the reset is issued by a Backup reset it is possible to, e.g. alter the startup routine in the main function by first evaluating the Reset Cause register. The Reset Controller contains additional 32-bit registers for storing state information, useful for determining the wakeup cause and the correct execution at startup after BACKUP.
Since only the backup domain is powered, the device will consume a minimum amount of power. From BACKUP the device is able to wake up on External Wakeup pins, Real-Time Counter (RTC) interrupts or the Battery Backup Power Switch (BBPS). BBPS can also be used to enter BACKUP. This is further investigated in Battery Backup Power Switch (BBPS). For that purpose the External Wakeup pins must be configured correctly. See the "External Wakeup Detector" section in the "Reset Controller" chapter in the datasheet for more details. Note that the External Interrupt Controller (EIC) is not part of the backup power domain and can not be used to wake the device from BACKUP.