PolarFire, RT PolarFire, and PolarFire SoC devices allow you to restrict access to the Transceiver, PCIe, Transmit PLL, PLL, DLL, Lane Controller, Crypto, TVS, Tamper, and VoltageDetect configuration registers. Libero SoC v2021.2 includes the Register Lock Bits Configuration tool to lock these configuration registers and prevent them from being overwritten by initiators that have access to these registers.
An initial Configuration Lock Bit file is created when you generate FPGA array data. The file is named <project>/designer/<design>/<design>_init_config_lock_bits.txt
. All registers or blocks are unlocked by default. Use this file as a template to make changes. Modify it to ensure that the lock bits are set to 0 for all register bits you want locked, and then save the file with a different name.
To import the Lock Bit Configuration File into a project:
For more details, see the AC478: PolarFire FPGAs for Safety-Critical Applications.