Timing Constraint Enhancements: Multi-cycle Start and End Options

Libero SoC v2021.2 adds support for -start and -end options to the set_multicycle SDC timing constraint. These options allow users to specify which clock period is applied for the additional cycles.

• For -end, the capturing clock period is applied, which is the default for setup analysis.
• For -start, the launching clock is applied, which is the default for hold analysis.

Existing designs without -start or -end will not be affected, as the defaults are unchanged.