SAM V71 Xplained Ultra includes a WOLFSON WM8904 Audio CODEC for input and output of digital sound, the kit has two 3.5mm stereo jacks for microphone input and headphone output. There is also an (optional) external PLL, Cirrus Logic CS2100CP, that can be used to generate a reference clock to the WM8904. In an Ethernet AVB application, the CS2100CP PLL can be used to accurately reconstruct a media clock that is generated at a remote network node.
The WM8904 is configured through I2C while audio data is transferred via the SSC module in the SAM V71. The CS2100CP PLL is also configured through I2C, and the input clock reference is from PD21 which is internally connected to the timer unit of the Ethernet MAC in the ATSAMV71Q21.
| SAM V71 pin | Function | Audio function | Shared functionality |
|---|---|---|---|
| PA03 | TWD0 | I2C control interface, data line | EXT1, EXT2, 2EDBG IC,LCD, Camera, PLL, MediaLB, EEPROM, Crypto, and Shield |
| PA04 | TWCK0 | I2C control interface, clock line | EXT1, EXT2, 2EDBG IC,LCD, Camera, PLL, MediaLB, EEPROM, Crypto, and Shield |
| PA10 | RD, receiver data | ADCDAT, digital audio output (microphone) | Shield |
| PA18 | PCK2 | MCLK, master clock | Shield |
| PB00 | TF, transmitter frame synchronization | LRCLK left/right data alignment clock | EXT1 and Shield (2) |
| PB01 | TK, transmitter clock | BCLK, bit clock, for synchronization | EXT1 and Shield (2) |
| PD11 | GPIO | Interrupt from Audio CODEC | Camera, EXT2, and Shield |
| PD24 | RF, receiver frame synchronization | LRCLK, left/right data alignment clock | Audio, Camera, and Shield |
| PD26 | TD, transmitter data | DACDAT, digital audio input (headphone) | EXT2 and Shield |
| SAM V71 pin | Function | Audio function | Shared functionality |
|---|---|---|---|
| PA03 | TWD0 | I2C control interface, data line | EXT1, EXT2, 2EDBG IC,LCD, Camera, Audio, MediaLB, EEPROM, Crypto, and Shield |
| PA04 | TWCK0 | I2C control interface, data line | EXT1, EXT2, 2EDBG IC,LCD, Camera, Audio, MediaLB, EEPROM, Crypto, and Shield |
| PD21 | TIOA11 | REFCLK, PLL input | Camera, EXT1, EXT2, EDBG SPI, and Shield (2) |
| PA22 | RK, receiver clock | PLL output | Shield |