PLL Status not Working as Expected
The PLL Status (PLLS) bit in the Main Clock Status (MCLKSTATUS) register will never be set to ‘
1
’ if the Run Standby (RUNSTDBY) bit in PLL Control A (PLLCTRLA) register is set to ‘
1
’ and no peripherals are requesting the PLL oscillator.
Work Around
None.
Affected Silicon Revisions
Rev. A3
Rev. A4
X
X
Parent topic:
CLKCTRL - Clock Controller