A clarification of the EEPROM Save During Chip Erase (EESAVE) fuse description in the System Configuration 0 (SYSCFG0) fuse has been made.
Bit 0 - EESAVE EEPROM Save During Chip Erase
This bit controls if the EEPROM will be erased or not during a chip erase.
Value | Name | Description |
---|---|---|
0 |
DISABLE | EEPROM erased during chip erase |
1 |
ENABLE | EEPROM not erased during chip erase regardless of whether the device is locked or not |