Initialize an interrupt in the following order:
- 1.Optional: Configure the expected
location of the interrupt vectors using the IVSEL bit in the Control A (CPUINT.CTRLA)
register.
- 2.Optional: Enable compact vector table by
writing ‘
1’ to the CVT bit in the Control A (CPUINT.CTRLA)
register.
- 3.Optional: Enable vector prioritizing by round robin by writing a ‘1’ to the Round Robin
Priority Enable (LVL0RR) bit in CPUINT.CTRLA.
- 4.Optional: Select the Priority Level 1
vector by writing the interrupt vector number to the Interrupt Vector with Priority
Level 1 (CPUINT.LVL1VEC) register.
- 5.Optional: Modify the priority of the LVL0 interrupts by configuring Interrupt Priority
Level 0 (LVL0PRI) register.
- 6.Configure the interrupt conditions
within each peripheral and enable the peripheral’s interrupt.
- 7.Enable interrupts globally by writing a
‘
1’ to the Global Interrupt Enable (I) bit in the CPU Status
(CPU.SREG) register.